Xe-HPC

Bringing a new range of hardware to market is not an easy task, even for Intel. The company has an install base of its ‘Gen’ graphics in hundreds of millions of devices around the world, however the range of use is limited, and it doesn’t tackle every market. This is why Intel started to create its ‘Xe’ graphics portfolio. The new graphics design isn’t just a single microarchitecture – by mixing and matching units where needed, Intel has identified four configurations that target key markets in its sights, ranging from the TeraFLOPs needed at the low-end up to Peta-OPs for high performance computing. Leading up the charge on the driver and software side of the equation is Intel’s Lisa Pearce. Lisa is a 23 year...

Intel Xe-HPC GPU Status Update: 4 Process Nodes Make 1 Accelerator

Continuing today’s GPU news from Intel’s Architecture Day presentation, on top of the Xe-LP architecture briefing and Xe-HPG reveal, the company has also offered a brief roadmap update for...

20 by Ryan Smith on 8/13/2020

Analyzing Intel’s Discrete Xe-HPC Graphics Disclosure: Ponte Vecchio, Rambo Cache, and Gelato

It has been a couple of weeks since Intel formally provided some high-level detail on its new discrete graphics strategy. The reason for the announcements and disclosures centered around...

47 by Dr. Ian Cutress on 12/24/2019

AnandTech Exclusive: An Interview with Intel’s Raja Koduri about Xe

This week Raja gave the keynote at Intel’s HPC DevCon event, a precursor to Supercomputing, and I did my usual thing of asking for the interview, fully expecting the...

73 by Dr. Ian Cutress on 11/20/2019

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