A7 SoC Explained

I’m still surprised by the amount of confusion around Apple’s CPU cores, so that’s where I’ll start. I’ve already outlined how ARM’s business model works, but in short there are two basic types of licenses ARM will bestow upon its partners: processor and architecture. The former involves implementing an ARM designed CPU core, while the latter is the creation of an ARM ISA (Instruction Set Architecture) compatible CPU core.

NVIDIA and Samsung, up to this point, have gone the processor license route. They take ARM designed cores (e.g. Cortex A9, Cortex A15, Cortex A7) and integrate them into custom SoCs. In NVIDIA’s case the CPU cores are paired with NVIDIA’s own GPU, while Samsung licenses GPU designs from ARM and Imagination Technologies. Apple previously leveraged its ARM processor license as well. Until last year’s A6 SoC, all Apple SoCs leveraged CPU cores designed by and licensed from ARM.

With the A6 SoC however, Apple joined the ranks of Qualcomm with leveraging an ARM architecture license. At the heart of the A6 were a pair of Apple designed CPU cores that implemented the ARMv7-A ISA. I came to know these cores by their leaked codename: Swift.

At its introduction, Swift proved to be one of the best designs on the market. An excellent combination of performance and power consumption, the Swift based A6 SoC improved power efficiency over the previous Cortex A9 based design. Swift also proved to be competitive with the best from Qualcomm at the time. Since then however, Qualcomm has released two evolutions of its CPU core (Krait 300 and Krait 400), and pretty much regained performance leadership over Apple. Being on a yearly release cadence, this is Apple’s only attempt to take back the crown for the next 12 months.

Following tradition, Apple replaces its A6 SoC with a new generation: A7.

With only a week to test battery life, performance, wireless and cameras on two phones, in addition to actually using them as intended, there wasn’t a ton of time to go ridiculously deep into the new SoC’s architecture. Here’s what I’ve been able to piece together thus far.

First off, based on conversations with as many people in the know as possible, as well as just making an educated guess, it’s probably pretty safe to say that the A7 SoC is built on Samsung’s 28nm HK+MG process. It’s too early for 20nm at reasonable yields, and Apple isn’t ready to move some (not all) of its operations to TSMC.

The jump from 32nm to 28nm results in peak theoretical scaling of 76.5% (the same design on 28nm can be no smaller than 76.5% of the die area at 32nm). In reality, nothing ever scales perfectly so we’re probably talking about 80 - 85% tops. Either way that’s a good amount of room for new features.

At its launch event Apple officially announced both die size for the A7 (102mm^2) as well as transistor count (over 1 billion). Don’t underestimate the magnitude of both of these disclosures. The technical folks at Cupertino are clearly winning some battle to talk more about their designs and not less. We’re not yet at the point where I’m getting pretty diagrams and a deep dive, but it’s clear that Apple is beginning to open up more (and it’s awesome).

Apple has never previously disclosed transistor count. I also don’t know if this “over 1 billion” figure is based on a schematic or layout transistor count. The only additional detail I have is that Apple is claiming a near doubling of transistors compared to the A6. Looking at die sizes and taking into account scaling from the process node shift, there’s clearly a more fundamental change to the chip’s design. It is possible to optimize a design (and transistors) for area, which seems to be what has happened here.

The CPU cores are, once again, a custom design by Apple. These aren’t Cortex A57 derivatives (still too early for that), but rather some evolution of Apple’s own Swift architecture. I’ll dive into specifics of what I’ve been able to find in a moment. To answer the first question on everyone’s mind, I believe there are two of these cores on the A7. Before I explain how I arrived at this conclusion, let’s first talk about cores and clock speeds.

I always thought the transition from 2 to 4 cores happened quicker in mobile than I had expected. Thankfully there are some well threaded apps that have been able to take advantage of more than two cores and power gating keeps the negative impact of the additional cores down to a minimum. As we saw in our Moto X review however, two faster cores are still better for most uses than four cores running at lower frequencies. NVIDIA forced everyone’s hand in moving to 4 cores earlier than they would’ve liked, and now you pretty much can’t get away with shipping anything less than that in an Android handset. Even Motorola felt necessary to obfuscate core count with its X8 mobile computing system. Markets like China seem to also demand more cores over better ones, which is why we see such a proliferation of quad-core Cortex A5/A7 designs. Apple has traditionally been sensible in this regard, even dating back to core count decisions in its Macs. I remembering reviewing an old iMac and pitting it against a Dell XPS One at the time. This was in the pre-power gating/turbo days. Dell went the route of more cores, while Apple chose for fewer, faster ones. It also put the CPU savings into a better GPU. You can guess which system ended out ahead.

In such a thermally constrained environment, going quad-core only makes sense if you can properly power gate/turbo up when some cores are idle. I have yet to see any mobile SoC vendor (with the exception of Intel with Bay Trail) do this properly, so until we hit that point the optimal target is likely two cores. You only need to look back at the evolution of the PC to come to the same conclusion. Before the arrival of Nehalem and Lynnfield, you always had to make a tradeoff between fewer faster cores and more of them. Gaming systems (and most users) tended to opt for the former, while those doing heavy multitasking went with the latter. Once we got architectures with good turbo, the 2 vs 4 discussion became one of cost and nothing more. I expect we’ll follow the same path in mobile.

Then there’s the frequency discussion. Brian and I have long been hinting at the sort of ridiculous frequency/voltage combinations mobile SoC vendors have been shipping at for nothing more than marketing purposes. I remember ARM telling me the ideal target for a Cortex A15 core in a smartphone was 1.2GHz. Samsung’s Exynos 5410 stuck four Cortex A15s in a phone with a max clock of 1.6GHz. The 5420 increases that to 1.7GHz. The problem with frequency scaling alone is that it typically comes at the price of higher voltage. There’s a quadratic relationship between voltage and power consumption, so it’s quite possibly one of the worst ways to get more performance. Brian even tweeted an image showing the frequency/voltage curve for a high-end mobile SoC. Note the huge increase in voltage required to deliver what amounts to another 100MHz in frequency.

The combination of both of these things gives us a basis for why Apple settled on two Swift cores running at 1.3GHz in the A6, and it’s also why the A7 comes with two cores running at the same max frequency. Interestingly enough, this is the same max non-turbo frequency Intel settled at for Bay Trail. Given a faster process (and turbo), I would expect to see Apple push higher frequencies but without those things, remaining conservative makes sense. I verified frequency through a combination of reporting tools and benchmarks. While it’s possible that I’m wrong, everything I’ve run on the device (both public and not) points to a 1.3GHz max frequency.

Verifying core count is a bit easier. Many benchmarks report core count, I also have some internal tools that do the same - all agreed on the same 2 cores/2 threads conclusion. Geekbench 3 breaks out both single and multithreaded performance results. I checked with the developer to ensure that the number of threads isn’t hard coded. The benchmark queries the max number of logical CPUs before spawning that number of threads. Looking at the ratio of single to multithreaded performance on the iPhone 5s, it’s safe to say that we’re dealing with a dual-core part:

Geekbench 3 Single vs. Multithreaded Performance - Apple A7
  Integer FP
Single Threaded 1471 1339
Multi Threaded 2872 2659
A7 Advantage 1.97x 1.99x
Peak Theoretical 2C Advantage 2.00x 2.00x

Now the question is, what’s changed in these cores?

 

Introduction, Hardware & Cases After Swift Comes Cyclone
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  • purerice - Wednesday, September 18, 2013 - link

    so far little mention of battery life. I wonder if LPDDR3 has a detrimental effect on battery life compared to LPDDR2.

    I usually like Anand's work but this quote got me: Although Apple could conceivably keep innovating to the point where an A-series chip ends up powering a Mac, I don't think that's in the cards today.

    Sorry Anand, the only way ARM can do that is to attempt redesigning its chips for desktop, or to try attempting some Larrabee-type chip based on its A-series. 8 Bay Trails working together could outrun a low end Haswell on performance, wattage, and price, but if it were really that easy, Intel would be doing that already. Maybe if ARM buys AMD, but with ARM's current strategy, it just doesn't seem feasible for them to overtake Intel or AMD.
  • Wilco1 - Wednesday, September 18, 2013 - link

    A quad core version of the current A7 would already outperform the current Haswell in the latest MacBook Air.
  • stacey94 - Wednesday, September 18, 2013 - link

    No it wouldn't. What are you even basing that off? The Geekbench 3 scores?

    Even assuming that's applicable across platforms, the Haswell will have twice the single threaded performance (again, based off Geekbench scores that probably mean nothing here). This matters more. By your logic AMD's 8 core bulldozer should have outperformed Sandy Bridge. It didn't.
  • Wilco1 - Thursday, September 19, 2013 - link

    With double the cores and a small clock boost to 1.5GHz it would have higher throughput. Single threaded performance would still be half of Haswell of course, so for that they would need to increase the clock and/or IPC further. A 20nm A7 could run at 2GHz, so that would be ~75% of Haswell ST performance. I would argue that is more than enough to not notice the difference if you had 4 cores.
  • Laxaa - Wednesday, September 18, 2013 - link

    Nice review, but Iæm dissapointed about the audio capture performance. 64kbps mono is not OK in 2013, and I see that most smartphone manufacturers skips on this. Even my Lumia 920 dissapoints in this department(96kbps mono) but at least it has HAAC mics that makes it a decent companion at concerts(I think the 1020 has 128 kbps stereo)

    Why isn't this an issue in an industry where everyone guns for better video and still image performance? It seems like such a small thing to ask for.
  • ddriver - Wednesday, September 18, 2013 - link

    Same thing as with the lack of ac wifi and lte-a, with so much improvements in the 5s, apple really needs to hold back on a few features so it can make the iphone 6 an attractive product. You can pretty much bet money that the iphone 6 will fill those gaps, deliberately left gaping.
  • steven75 - Friday, September 20, 2013 - link

    If that's what you think, I can only imagine what you thought about the Nexus 4 with no LTE at the time that ALL phones came with LTE (not just flagships) and the Moto X with it's middle tier internals yet flagship pricing.
  • teiglin - Wednesday, September 18, 2013 - link

    I'm a bit baffled by the battery life numbers. Specifically the difference in performance relative to the 5/5c on wifi vs. cellular. Given that they are all presumably using the same wifi and cellular silicon, why is there such a dramatic relative increase in the battery life of the 5s compared to the 5/5c moving from wifi to LTE? I don't see why the newer SoC should be improving its efficiency over LTE vs. wifi; if anything, I'd expect a good wifi connection to feed data to the platform faster than LTE, allowing the newer silicon to race to sleep more effectively.

    Were all the tests conducted on the same operator with comparable signal strength? Obviously you can't do much to normalize against network congestion--a factor almost certain to favor tests run in the past, though perhaps middle-of-the-night testing might help minimize it--but what other factors could account for this difference? Do you have any speculation as to what could cause such a huge shift?
  • DarkXale - Wednesday, September 18, 2013 - link

    In wireless communications, power draw from the CPUs is considered negligible. Its transmitting the actual symbols (the bits) that costs massive amounts of power. So much in fact that compressing it will normally yield battery savings. Similarly, Anand makes a mistake here on the second to final page - higher data rates are -not- more power efficient, they are less so.
  • teiglin - Wednesday, September 18, 2013 - link

    It has been my experience that the SoC and display are more power-hungry than cellular data transfer in terms of peak power consumption. That's just anecdotal of course, based on comparing battery drain from an active download vs. screen-on-but-idle vs. screen-on-and-taxing-cpu and such. And if you're actually saying that SoC power draw in smartphones is negligible, then please just stop; I'm assuming you're just arguing that baseband/transceiver power is higher.

    Anand and Brian have always argued that newer, faster data transfer standards help battery life because generally those standards run at comparable power levels to the old ones but get tasks done faster, so for the same load (e.g. their battery life test). I'm not an expert in wireless communications, but their numbers have always borne out such arguments. I look at is as analogous to generational CPU improvements--they get faster and can spend more power while completing tasks, but total power to do a given task can be reduced by having a more efficient architecture.

    All of which is at best peripheral to my actual question, since I was asking about differences within the same communications standards at (presumably) the same theoretical data rates, but I guess Anand and company have stopped reading comments. :(

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