AMD Zen 2 Microarchitecture Analysis: Ryzen 3000 and EPYC Romeby Dr. Ian Cutress on June 10, 2019 7:22 PM EST
- Posted in
- Infinity Fabric
- PCIe 4.0
- Zen 2
- Ryzen 3000
- Ryzen 3rd Gen
Performance Claims of Zen 2
At Computex, AMD announced that it had designed Zen 2 to offer a direct +15% raw performance gain over its Zen+ platform when comparing two processors at the same frequency. At the same time, AMD also claims that at the same power, Zen 2 will offer greater than a >1.25x performance gain at the same power, or up to half power at the same performance. Combining this together, for select benchmarks, AMD is claiming a +75% performance per watt gain over its previous generation product, and a +45% performance per watt gain over its competition.
These are numbers we can’t verify at this point, as we do not have the products in hand, and when we do the embargo for benchmarking results will lift on July 7th. AMD did spend a good amount of time going through the new changes in the microarchitecture for Zen 2, as well as platform level changes, in order to show how the product has improved over the previous generation.
It should also be noted that at multiple times during AMD’s recent Tech Day, the company stated that they are not interested in going back-and-forth with its primary competition on incremental updates to try and beat one another, which might result in holding technology back. AMD is committed, according to its executives, to pushing the envelope of performance as much as it can every generation, regardless of the competition. Both CEO Dr. Lisa Su, and CTO Mark Papermaster, have said that they expected the timeline of the launch of their Zen 2 portfolio to intersect with a very competitive Intel 10nm product line. Despite this not being the case, the AMD executives stated they are still pushing ahead with their roadmap as planned.
|AMD 'Matisse' Ryzen 3000 Series CPUs|
|Ryzen 9||3950X||16C||32T||3.5||4.7||8 MB||64 MB||16+4+4||3200||105W||$749|
|Ryzen 9||3900X||12C||24T||3.8||4.6||6 MB||64 MB||16+4+4||3200||105W||$499|
|Ryzen 7||3800X||8C||16T||3.9||4.5||4 MB||32 MB||16+4+4||3200||105W||$399|
|Ryzen 7||3700X||8C||16T||3.6||4.4||4 MB||32 MB||16+4+4||3200||65W||$329|
|Ryzen 5||3600X||6C||12T||3.8||4.4||3 MB||32 MB||16+4+4||3200||95W||$249|
|Ryzen 5||3600||6C||12T||3.6||4.2||3 MB||32 MB||16+4+4||3200||65W||$199|
AMD’s benchmark of choice, when showcasing the performance of its upcoming Matisse processors is Cinebench. Cinebench a floating point benchmark which the company has historically done very well on, and tends to probe the CPU FP performance as well as cache performance, although it ends up often not involving much of the memory subsystem.
Back at CES 2019 in January, AMD showed an un-named 8-core Zen 2 processor against Intel’s high-end 8-core processor, the i9-9900K, on Cinebench R15, where the systems scored about the same result, but with the AMD full system consuming around 1/3 or more less power. For Computex in May, AMD disclosed a lot of the eight and twelve-core details, along with how these chips compare in single and multi-threaded Cinebench R20 results.
AMD is stating that its new processors, when comparing across core counts, offer better single thread performance, better multi-thread performance, at a lower power and a much lower price point when it comes to CPU benchmarks.
When it comes to gaming, AMD is rather bullish on this front. At 1080p, comparing the Ryzen 7 2700X to the Ryzen 7 3800X, AMD is expecting anywhere from a +11% to a +34% increase in frame rates generation to generation.
When it comes to comparing gaming between AMD and Intel processors, AMD stuck to 1080p testing of popular titles, again comparing similar processors for core counts and pricing. In pretty much every comparison, it was a back and forth between the AMD product and the Intel product – AMD would win some, loses some, or draws in others. Here’s the $250 comparison as an example:
Performance in gaming in this case was designed to showcase the frequency and IPC improvements, rather than any benefits from PCIe 4.0. On the frequency side, AMD stated that despite the 7nm die shrink and higher resistivity of the pathways, they were able to extract a higher frequency out of the 7nm TSMC process compared to 14nm and 12nm from Global Foundries.
AMD also made commentary about the new L3 cache design, as it moves from 2 MB/core to 4 MB/core. Doubling the L3 cache, according to AMD, affords an additional +11% to +21% increase in performance at 1080p for gaming with a discrete GPU.
There are some new instructions on Zen 2 that would be able to assist in verifying these numbers.
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JohnLook - Monday, June 10, 2019 - link@Ian Cutress Are you sure the Io dies are on TSMC's 14 & 12 nm processes ?
all info so far was that they were on GloFo's 14 nm ...
Ian Cutress - Monday, June 10, 2019 - linkSorry, glofo 14 and 12. Matisse IO die is Glofo 12nm. We triple confirmed.
JohnLook - Monday, June 10, 2019 - linkThanks :-)
scineram - Tuesday, June 11, 2019 - linkIt still says Epyc is TSMC.
John_M - Tuesday, June 11, 2019 - linkIt would be nice if the article was updated as not everyone reads the comments section and AnandTech articles do often get cited in Wikipedia articles.
Smell This - Wednesday, June 12, 2019 - linkI feel safe in saying that Wiki-Dom will be right on it . . .
So __ those little white lines are the Infinity Scalable Data Fabric (SDF) and the Infinity Scalable Control Fabric (SCF), connecting "Core" chiplets to the I/O core.
"The SDF might have dozens of connecting points hooking together things such as PCIe PHYs, memory controllers, USB hub, and the various computing and execution units."
"The SDF is a superset of what was previously HyperTransport. The SCF is a complementary plane that handles the transmission ..."
Of course, I counted them (rolling eyes at myself), and determined there were 32 connecting a single core chiplet to the I/O core. I'm smelling a rational relationship between those 32, and other such stuff. Are the number of IF links a proprietary secret to AMD?
Yah know? It would be a nice 'get' if a tech writer interviewed someone in that former Sea Micro bunch, and spilled a few beans . . .
Smell This - Wednesday, June 12, 2019 - link
Might be 36 ... LOL
Smell This - Wednesday, June 12, 2019 - linkCould be 42- or 46 IF links on the right
(I'll stop obsessing)
sweetca - Thursday, June 13, 2019 - linkI don't understand anything you said 🙂
Smell This - Sunday, June 16, 2019 - linkI was (am) trolling Ian/AT for a **Deep(er) Dive** on the Infinity Fabric -- its past, and its future. The EPYC Rome processors have 8 "Core" chiplets connecting to the I/O core. Right? Those 'little white lines' (32- to 46?) from each chiplet, presumably, scale to ... infinity?
AMD purchased SeaMicro 7 years ago as the "Freedom Fabric" platform was developed. Initially the SM15000 'stitched' together 512 compute cores, 160 gigabits of I/O networking and 5+ petabytes of storage to form a 'very-high-density server.'
And then . . . they went dark.
(see the last comment on that link)