Pseudo-SLC caches for TLC-based SSDs are almost as old as TLC NAND itself, serving as a simple and practical solution to TLC's lower sustained throughput. But like all caches, pseudo-SLC caches have a finite size; and once you run over it, you're back to directly hitting the TLC. So what is a user or system builder to do if they need a drive with SLC-like performance all the time? For a while, the answer to that has been MLC drives, but with MLC slowly but surely on its way out as well, other solutions are needed. And to that end, MEMXPRO is introducing a series of new drives that go the opposite direction, embracing pseudo-SLC mode to its very core by making the entire drive pseudo-SLC.

Based on 64-layer 3D TLC memory, MEMXPRO's PC32 drives use drive-wide pseudo-SLC mode to give the drives MLC-like performance and reliability. This setup is overkill for most applications, but for use cases that require SSDs with long lifespans, and high durability – MEMXPRO's specialty – the PC32 fills an important niche.

The MEMXPRO PC32 drives in are based on the Silicon Motion SM2262EN controller as well as Micron’s B17A 64-layer 3D TLC NAND memory, which is rated for 10,000 P/E cycles. By putting the drives in pseudo-SLC mode, the manufacturer is able to increase their durability to 40,000 P/E cycles, albeit at the cost of capacity. Since TLC NAND that offers 3-bits of storage per cell is otherwise reduced to 1-bit per cell, the drives are available in capacities from just 80 GB to 320 GB. As for throughput, with the high-end controller used for the drive, MEMXPRO has rated the drives' sustained sequential read and write performance 3,250 and 2,980 MB/s respectively, which is in line with other modern SSDs featuring a PCIe 3.0 x4 interface.

Under the hood, MEMXPRO’s PC32 drives are built on PCBs with side fill and under fill protective conformal coating to enhance their reliability. Also, they are designed to ensure reliable performance within industrial  temperature ranges (-40°C to +85°C), so the number of applications they can address is wide. Meanwhile, the SM2262EN controller fully supports AES 256-bit encryption with TCG OPAL 2.0 compliance, so the manufacturer can enable this functionality at request with an appropriate firmware. PC32 also supports MEMXPRO’s proprietary mSMART intelligent storage management tool to monitor drive health and lifespan status that warns owner of the drive about increased risks.

MEMXPRO will demonstrate its PC32 and other SSDs at the upcoming Embedded World 2020 trade show later this month, and will start taking orders on the drives shortly. The company has also noted their interest in developing more all-SLC drives, noting that that if the market requires higher-capacity products in a different form-factor, those SSDs could be developed as well.

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Source: MEMXPRO

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  • Billy Tallis - Friday, February 21, 2020 - link

    That's still a ton of write amplification for little to no benefit—possibly even significant harm to performance, because compacting data takes time, and if you're constantly trying to use the least-dense data representation you can get away with, you'll have to do a lot of compaction on a just-in-time basis rather than during idle time. Reply
  • deil - Friday, February 21, 2020 - link

    40k P/E cycles, does not look so bad with images that told me true SLC survived 100k without issues. Gaining ~20x the performance since then is worth it? Reply
  • PeachNCream - Friday, February 21, 2020 - link

    Older planar SLC drives were manufactured with comparably big floating gates that were, by nature of their physical size, a lot more durable than modern 3D charge traps. In the name of capacity improvements, we have significant shrinkage so part of that durability loss is due to size and not the number of bit states per cell. Reply
  • mode_13h - Saturday, February 22, 2020 - link

    No, just means it's capable of handling lots of dur's. Reply
  • thetrashcanisfull - Friday, February 21, 2020 - link

    What's the point? If they increase write endurance by 4x but only have 1/3rd the capacity, they are only improving total drive write capacity by 33%. IDK... just doesn't seem worth it to me. Reply
  • mode_13h - Saturday, February 22, 2020 - link

    It's not only about endurance, but also sustained write performance. In fact, I'd say mainly performance.

    Oh, and check out the temperature range. Both that and power-off data retention time should be additional beneficiaries of reducing the number of bits per cell.
    Reply
  • FunBunny2 - Friday, February 21, 2020 - link

    someone have a link to the definition of pseudo-SLC? that is, isn't a cell just a cell? modulo fab node size, of course. IOW, isn't the xLC status a function *only* of the controller? Reply
  • Billy Tallis - Friday, February 21, 2020 - link

    The memory array is the same for QLC and SLC, but a QLC die requires more peripheral circuitry than a SLC-only die. (Though in practice, the SLC-only dies that are being made today tend to have more peripheral circuitry because they use smaller page and block sizes to optimize for performance over density.) Reply
  • FunBunny2 - Friday, February 21, 2020 - link

    thanx Reply
  • mode_13h - Saturday, February 22, 2020 - link

    When you start packing multiple bits per cell, it seems to me that you'd need circuitry that can set and interpret different charge levels.

    Also, I remember reading that one reason MLC (or was it TLC?) is slower to write is that the charge needs to be checked and often a cell must be re-written to get the right amount of charge.
    Reply

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